View X9313UM-3T1_4280200.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

1 ? fn8177.5 caution: these devices are sensitive to electrosta tic discharge; follow proper ic handling procedures. 1-888-intersil or 1-888-468-3774 | intersil (and design) is a registered trademark of intersil americas inc. xdcp is a trademark of intersil americas inc. copyright intersil americas inc. 2005, 2006, 2007. all rights reserved all other trademarks mentioned are the property of their respective owners. x9313 digitally controlled potentiometer (xdcp?) linear, 32 taps, 3 wire interface, terminal voltages v cc the intersil x9313 is a digitally controlled potentiometer (xdcp). the device consists of a resistor array, wiper switches, a control section, and nonvolatile memory. the wiper position is controlled by a 3-wire interface. the potentiometer is implemen ted by a resistor array composed of 31 resistive elements and a wiper switching network. between each element and at either end are tap points accessible to the wiper terminal. the position of the wiper element is controlled by the cs , u/d , and inc inputs. the position of the wiper can be stored in nonvolatile memory and then be recalled upon a subsequent power-up operation. the device can be used as a th ree-terminal potentiometer or as a two-terminal variable resistor in a wide variety of applications including: ? control ? parameter adjustments ? signal processing features ? solid-state potentiometer ? 3-wire serial interface ? 32 wiper tap points - wiper position stored in nonvolatile memory and recalled on power-up ? 31 resistive elements - temperature compensated - end to end resistance range 20% - terminal voltages, -v cc to +v cc ? low power cmos -v cc = 3v or 5v - active current, 3ma max. - standby current, 500a max. ? high reliability - endurance, 100,000 data changes per bit - register data retention, 100 years ?r total values = 1k , 10k , 50k ? packages - 8 ld soic, 8 ld msop and 8 ld pdip ? pb-free plus anneal available (rohs compliant) block diagram 5-bit nonvolatile memory store and recall control circuitry one of outputs resistor array r h /v h u/d inc cs transfer gates thirty-two v cc v ss r l /v l r w /v w control up/down v cc (supply voltage) v ss (ground) r h /v h r w /v w r l /v l general detailed 0 1 2 28 29 30 31 (u/d ) increment (inc ) device select (cs ) and memory 5-bit up/down counter time decoder active at a data sheet april 18, 2007
2 fn8177.5 april 18, 2007 ordering information part number part marking v cc range (v) r total (k ) temperature range (c) package pkg. dwg. # x9313umi 13ui 4.5 to 5.5 50 -40 to +85 8 ld msop m8.118 x9313umiz (note) ddb -40 to +85 8 ld msop (pb-free) m8.118 x9313up x9313up 0 to +70 8 ld pdip mdp0031 x9313us* x9313u 0 to +70 8 ld soic mdp0027 x9313usz* (note) x9313u z 0 to +70 8 ld soic (pb-free) m8.15 x9313usi x9313u i -40 to +85 8 ld soic mdp0027 x9313usiz (note) x9313u zi -40 to +85 8 ld soic (pb-free) m8.15 x9313wmz (note) ddf 10 0 to +70 8 ld msop (pb-free) m8.118 x9313wmi* 13wi -40 to +85 8 ld msop m8.118 x9313wmiz* (note) dde -40 to +85 8 ld msop (pb-free) m8.118 x9313wp x9313wp 0 to +70 8 ld pdip mdp0031 x9313wpz-3 x9313wp zd -40 to +85 8 ld pdip*** (pb-free) mdp0031 x9313wpi x9313wp i -40 to +85 8 ld pdip mdp0031 x9313wpiz x9313wp zi -40 to +85 8 ld pdip*** (pb-free) mdp0031 x9313ws* , ** x9313ws 0 to +70 8 ld soic mdp0027 x9313wsz* , ** (note) x9313w z 0 to +70 8 ld soic (pb-free) m8.15 x9313wsi* x9313ws i -40 to +85 8 ld soic mdp0027 x9313wsiz* (note) x9313ws zi -40 to +85 8 ld soic (pb-free) m8.15 x9313zm 313z 0 to +70 8 ld msop m8.118 x9313zmz (note) ddj 0 to +70 8 ld msop (pb-free) m8.118 x9313zmi* , ** 13zi 1 -40 to +85 8 ld msop m8.118 x9313zmiz* , ** (note) ddh -40 to +85 8 ld msop (pb-free) m8.118 x9313zp x9313zp 0 to +70 8 ld pdip mdp0031 x9313zpi x9313zp i -40 to +85 8 ld pdip mdp0031 x9313zpiz (note) x9313zp zi -40 to +85 8 ld pdip*** (pb-free) mdp0031 x9313zs* , ** x9313zs 0 to +70 8 ld soic mdp0027 x9313zsz* , ** (note) x9313 z 0 to +70 8 ld soic (pb-free) m8.15 x9313zsi* x9313zs i -40 to +85 8 ld soic mdp0027 x9313zsiz* (note) x9313zs zi -40 to +85 8 ld soic (pb-free) m8.15 X9313UM-3T1 13ud 3 to 5.5 50 0 to +70 8 ld msop tape and reel m8.118 x9313umz-3t1 (note) ddd 0 to +70 8 ld msop tape and reel (pb-free) m8.118 x9313umi-3* 13ue -40 to +85 8 ld msop m8.118 x9313umiz-3* (note) 13uez -40 to +85 8 ld msop (pb-free) m8.118 x9313us-3* , ** x9313u d 0 to +70 8 ld soic mdp0027 x9313usz-3* , ** (note) x9313u zd 0 to +70 8 ld soic (pb-free) m8.15 x9313wm-3* 13wd 10 0 to +70 8 ld msop m8.118 x9313wmz-3* (note) ddg 0 to +70 8 ld msop (pb-free) m8.118 x9313wmi-3* 13we -40 to +85 8 ld msop m8.118 x9313
3 fn8177.5 april 18, 2007 pin descriptions rh/vh and rl/vl the high (rh/vh) and low (rl/vl) terminals of the x9313 are equivalent to the fixed terminals of a mechanical potentiometer. the terminology of rl/vl and rh/vh references the relative position of the terminal in relation to wiper movement directi on selected by the u/d input and not the voltage potential on the terminal. rw/vw rw/vw is the wiper terminal and is equivalent to the movable terminal of a mechanical potentiometer. the position of the wiper within t he array is determined by the control inputs. the wiper terminal series resistance is typically 40 at v cc = 5v. up/down (u/d ) the u/d input controls the direction of the wiper movement and whether the counter is incremented or decremented. increment (inc ) the inc input is negative-edge triggered. toggling inc will move the wiper and either increment or decrement the counter in the direction indicated by the logic level on the u/d input. chip select (cs ) the device is selected when the cs input is low. the current counter value is stored in nonvolatile memory when cs is returned high while the inc input is also high. after the store operation is complete t he x9313 will be placed in the low power standby mode until the device is selected once again. x9313wmiz-3* (note) 13wez -40 to +85 8 ld msop (pb-free) m8.118 x9313ws-3* x9313w d 0 to +70 8 ld soic mdp0027 x9313wsz-3* (note) x9313w zd 0 to +70 8 ld soic (pb-free) m8.15 x9313zm-3* 13zd 3 to 5.5 1 0 to +70 8 ld msop m8.118 x9313zmz-3* (note) ddk 0 to +70 8 ld msop (pb-free) m8.118 x9313zmi-3* 13ze -40 to +85 8 ld msop m8.118 x9313zmiz-3* (note) 13zez -40 to +85 8 ld msop (pb-free) m8.118 x9313zp-3 x9313zp d 0 to +70 8 ld pdip mdp0031 x9313zpz-3 (note) x9313zp zd 0 to +70 8 ld pdip (pb-free)*** mdp0031 x9313zs-3* x9313z d 0 to +70 8 ld soic mdp0027 x9313zsz-3* (note) x9313z zd 0 to +70 8 ld soic (pb-free) m8.15 x9313zsi-3* x9313z e -40 to +85 8 ld soic mdp0027 x9313zsiz-3* (note) x9313z ze -40 to +85 8 ld soic (pb-free) m8.15 note: intersil pb-free plus anneal products em ploy special pb-free material sets; molding compounds/die attach materials and 100 % matte tin plate termination finish, which are rohs compliant and compatible with both snpb and pb-free soldering operations. intersil pb-free p roducts are msl classified at pb-free peak reflow temper atures that meet or exceed the pb-free requirements of ipc/jedec j std-020. *add "t1" suffix for tape and reel. **add "t2" suffix for tape and reel. ***pb-free pdips can be used for through hole wave solder processi ng only. they are not intended for use in reflow solder proce ssing applications. ordering information (continued) part number part marking v cc range (v) r total (k ) temperature range (c) package pkg. dwg. # pinouts x9313 8 ld pdip, 8 ld soic top view x9313 8 ld msop top view vcc cs inc u/d rh/vh vss 1 2 3 4 8 7 6 5 x9313 rl/vl rw/vw vcc cs u/d rh/vh 1 2 3 4 8 7 6 5 x9313 rl/vl rw/vw inc vss x9313
4 fn8177.5 april 18, 2007 principles of operation there are three sections of the x9313: the input control, counter and decode section; the nonvolatile memory; and the resistor array. the input co ntrol section operates just like an up/down counter. the output of this counter is decoded to turn on a single electronic switch connecting a point on the resistor array to the wiper output. under the proper conditions the contents of t he counter can be stored in nonvolatile memory and retained for future use. the resistor array is comprised of 31 individual resistors connected in series. at either end of the array and between each resistor is an electronic switch that tr ansfers the potential at that point to the wiper. the wiper, when at either fixed terminal, acts like its mechanical equivalent and does not move beyond the last position. that is, the counte r does not wrap around when clocked to either extreme. the electronic switches on the device operate in a ?make before break? mode when the wiper changes tap positions. if the wiper is moved several positions, multiple taps are connected to the wiper for t iw (inc to v w change). the r total value for the device can temporarily be reduced by a significant amount if the wiper is moved several positions. when the device is powered-do wn, the last wiper position stored will be maintained in the nonvolatile memory. when power is restored, the content s of the memory are recalled and the wiper is set to the value last stored. instructions and programming the inc , u/d and cs inputs control the movement of the wiper along the resistor array. with cs set low the device is selected and enabled to respond to the u/d and inc inputs. high to low transitions on inc will increment or decrement (depending on the state of the u/d input) a seven bit counter. the output of this counter is decoded to select one of thirty-two wiper positions along the resistive array. the value of the counter is st ored in nonvolatile memory whenever cs transitions high while the inc input is also high. the system may select the x9313, move the wiper and deselect the device without havi ng to store the latest wiper position in nonvolatile memory. after the wiper movement is performed as described above and once the new position is reached, the system must keep inc low while taking cs high. the new wiper position will be maintained until changed by the system or unt il a power-up/down cycle recalled the previously stored data. this procedure allows the syst em to always power-up to a preset value stored in nonvolatile memory; then during system operation minor adjust ments could be made. the adjustments might be based on user preference, system parameter changes due to temperature drift, etc. the state of u/d may be changed while cs remains low. this allows the host system to enable the device and then move the wiper up and down until the proper trim is attained. symbol table table 1. pin names symbol description rh/vh high terminal rw/vw wiper terminal rl/vl low terminal vss ground vcc supply voltage u/d up/down control input inc increment control input cs chip select control input table 2. mode selection cs inc u/d mode l h wiper up l l wiper down h x store wiper position h x x standby current l x no store, return to standby l h wiper up (not recommended) l l wiper down (not recommended) waveform inputs outputs must be steady will be steady may change from low to high will change from low to high may change from high to low will change from high to low don?t care: changes allowed changing: state not known n/a center line is high impedance x9313
5 fn8177.5 april 18, 2007 absolute maximum ratings recommended operating conditions temperature under bias . . . . . . . . . . . . . . . . . . . . .-65c to +135c storage temperature . . . . . . . . . . . . . . . . . . . . . . . .-65c to +150c voltage on cs , inc , u/d , and v cc with respect to v ss . . . . . . . . . . . . . . . . . . . . . . . . -1v to +7v voltage on v h , v l , v w with respect to v ss . . . . . . . . . . . . . . . . . . . . . . . . . . . . -6v to +7v v = |v h - v l |: x9313z . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4v x9313w, x9313u . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10v lead temperature (soldering 10s) . . . . . . . . . . . . . . . . . . . . . +300c i w (10s) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8.8ma esd rating human body model (per mil-std-883 method 3015.7) . . . 2.0kv machine model (per eiaj ed-4701 method c-111) . . . . . . . .200v temperature: commercial. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0c to +70c industrial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40c to +85c supply voltage (vcc): x9313 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5v 10% x9313-3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3v to 5.5v max wiper current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.4ma power rating: r total 10k . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10mw r total 1k . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16mw pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/pb-freereflow.asp pb-free pdips can be used for thr ough hole wave solder processing only. they are not intended for us e in reflow solder processing applications caution: stresses above those listed under ?absolute maximum rati ngs? may cause permanent damage to the device. this is a stres s rating only; functional operation of the device (at these or any other conditions above those listed in the operational sections of this specification) is not implied. exposure to absolute maximum rating conditions for extend ed periods may affect device reliability. potentiometer characteristics over recommended operating conditions unless otherwise stated. symbol parameter test conditions/notes limits unit min typ max end-to-end resistance tolerance 20 % v vh v h terminal voltage - v cc + v cc v v vl v l terminal voltage - v cc + v cc v r w wiper resistance i w = (v h - v l )/r total , v cc = 5v 40 100 i w wiper current 4.4 ma noise (note 5) ref: 1khz -120 dbv resolution 3% absolute linearity (note 1) r w(n)(actual) - r w(n)(expected) 1 mi (note 3) relative linearity (note 2) r w(n+1) - (r w(n) +mi) 0.2 mi (note 3) r total temperature coefficient (note 5) 300 ppm/c ratiometric temperature coefficient (note 5) 20 ppm/c c h /c l /c w (note 5) potentiometer capacitances see circuit #3 10/10/25 pf notes: 1. absolute linearity is utilized to determine actual wiper voltage ve rsus expected voltage = (v w(n)(actual) - v w(n)(expected) ) = 1 mi maximum. 2. relative linearity is a measure of the error in step size between taps = r w(n+1) - (r w(n) + mi) = 0.2 mi. 3. 1 mi = minimum increment = r tot /31. x9313
6 fn8177.5 april 18, 2007 dc operating characteristics over recommended operating condi tions unless otherwise stated. symbol parameter test conditions/notes limits unit min typ (note 4) max i cc v cc active current cs = v il , u/d = v il or v ih and inc = 0.42/2.4v @ max t cyc 13ma i sb standby supply current cs = v cc - 0.3v, u/d and inc = v ss or v cc - 0.3v 200 500 a i li cs , inc , u/d input leakage current v in = v ss to v cc 10 a v ih cs , inc , u/d input high current 2 v v il cs , inc , u/d input low current +0.8 v c in (note 5) cs , inc , u/d input capacitance v cc = 5v, v in = v ss , t a = +25c, f = 1mhz 10 pf endurance and data retention parameter min unit minimum endurance 100,000 data changes per bit per register data retention 100 years figure 1. test circuit #1 figure 2. test ci rcuit #2 figure 3. circuit #3 spice macro model test point v w /r w v h /r h v l /r l v s force current vw test point v h /r h v w /r w v l /r l c h c l r w 10pf 10pf r h r l r total c w 25pf x9313
7 fn8177.5 april 18, 2007 power-up and power-down requirements the recommended power-up sequence is to apply v cc /v ss first, then the potentiometer voltages. during power-up, the data sheet parameters for the dcp do not fully apply until 1ms after v cc reaches its final value. the v cc ramp spec is always in effect. in order to prevent unwanted tap position changes, or an inadvertent store, bring the cs and inc high before or concurrently with the vcc pin on power-up. ac operating characteristics over recommended operating conditions unless otherwise stated. symbol parameter limits unit min typ (note 4) max t ci cs to inc setup 100 ns t id inc high to u/d change 100 ns t di u/d to inc setup 2.9 s t il inc low period 1 s t ih inc high period 1 s t ic inc inactive to cs inactive 1 s t cph cs deselect time (store) 20 ms t cph cs deselect time (no store) 100 ns t iw inc to v w change 5 s t cyc inc cycle time 2 s t r , t f (note 5) inc input rise and fall time 500 s t pu (note 5) power-up to wiper stable 10 s t r v cc (note 5) v cc power-up rate 0.2 50 v/ms t wr (note 5) store cycle 10 ms notes: 4. typical values are for t a = +25c and nominal supply voltage. 5. this parameter is not 100% tested. cs inc u/d v w t ci t il t ih t cyc t id t di t iw mi (see note) t ic t cph t f t r 10% 90% 90% note: mi in the ac timing diagram refers to the minimum incremental change in the v w output due to a change in the wiper position. figure 4. ac timing diagram x9313
8 fn8177.5 april 18, 2007 applications information electronic digitally controlled potentiometers (xdcp) provide three powerful application advan tages; (1) the variability and reliability of a solid-state potent iometer, (2) the flexibility of computer-based digital controls, and (3) the retentivity of nonvolatile memory used fo r the storage of multiple potentiometer settings or data. basic configurations of electronic potentiometers basic circuits v r v w /r w v r i three-terminal potentiometer; variable voltage divider two-terminal variable resistor; variable current v h v l cascading techniques buffered reference voltage ? + +5v r 1 +v -5v vw v ref v out op-07 v w vw/rw +v +v +v x (a) (b) v out = v w /r w noninverting amplifier + ? v s v o r 2 r 1 v o = (1 + r 2/ r 1 )v s lm308a voltage regulator r 1 r 2 i adj v o (reg) = 1.25v (1 + r 2/ r 1 ) + i adj r 2 v o (reg) v in 317 offset voltage adjustment + ? v s v o r 2 r 1 100k 10k 10k 10k -12v +12v tl072 comparator with hysteresis v ul = [r 1/ (r 1 + r 2 )] v o (max) v ll = [r 1/ (r 1 + r 2 )] v o (min) + ? v s v o r 2 r 1 } } lt311a +5v -5v (for additional circuits see an115) x9313
9 fn8177.5 april 18, 2007 x9313 mini small outline pl astic packages (msop) notes: 1. these package dimensions are wi thin allowable dimensions of jedec mo-187ba. 2. dimensioning and tolerancing per ansi y14.5m - 1994. 3. dimension ?d? does not include mold flash, protrusions or gate burrs and are measured at datum plane. mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. dimension ?e1? does not includ e interlead flash or protrusions and are measured at datum plane. interlead flash and protrusions shall not exceed 0.15mm (0.006 inch) per side. 5. formed leads shall be planar wi th respect to one another within 0.10mm (0.004) at seating plane. 6. ?l? is the length of terminal for soldering to a substrate. 7. ?n? is the number of terminal positions. 8. terminal numbers are shown for reference only. 9. dimension ?b? does not include dambar protrusion. allowable dambar protrusion shall be 0.08mm (0.003 inch) total in excess of ?b? dimension at maximum ma terial condition. minimum space between protrusion and adjacent lead is 0.07mm (0.0027 inch). 10. datums and to be determined at datum plane . 11. controlling dimension: millimeter. converted inch dimen- sions are for reference only. l 0.25 (0.010) l1 r1 r 4x 4x gauge plane seating plane e e1 n 12 top view index area -c- -b- 0.20 (0.008) a b c seating plane 0.20 (0.008) c 0.10 (0.004) c -a- -h- side view b e d a a1 a2 -b- end view 0.20 (0.008) c d e 1 c l c a - h - -a - - b - - h - m8.118 (jedec mo-187aa) 8 lead mini small outline plastic package symbol inches millimeters notes min max min max a 0.037 0.043 0.94 1.10 - a1 0.002 0.006 0.05 0.15 - a2 0.030 0.037 0.75 0.95 - b 0.010 0.014 0.25 0.36 9 c 0.004 0.008 0.09 0.20 - d 0.116 0.120 2.95 3.05 3 e1 0.116 0.120 2.95 3.05 4 e 0.026 bsc 0.65 bsc - e 0.187 0.199 4.75 5.05 - l 0.016 0.028 0.40 0.70 6 l1 0.037 ref 0.95 ref - n8 87 r 0.003 - 0.07 - - r1 0.003 - 0.07 - - 05 o 15 o 5 o 15 o - 0 o 6 o 0 o 6 o - rev. 2 01/03
10 fn8177.5 april 18, 2007 x9313 small outline plast ic packages (soic) index area e d n 123 -b- 0.25(0.010) c a m bs e -a- l b m -c- a1 a seating plane 0.10(0.004) h x 45 c h 0.25(0.010) b m m notes: 1. symbols are defined in the ?mo series symbol list? in section 2.2 of publication number 95. 2. dimensioning and tolerancing per ansi y14.5m - 1982. 3. dimension ?d? does not include mold flash, protrusions or gate burrs. mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. dimension ?e? does not include in terlead flash or protrusions. inter- lead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. the chamfer on the body is optional. if it is not present, a visual index feature must be located within the crosshatched area. 6. ?l? is the length of terminal for soldering to a substrate. 7. ?n? is the number of terminal positions. 8. terminal numbers are shown for reference only. 9. the lead width ?b?, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 10. controlling dimension: millimete r. converted inch dimensions are not necessarily exact. m8.15 (jedec ms-012-aa issue c) 8 lead narrow body small outline plastic package symbol inches millimeters notes min max min max a 0.0532 0.0688 1.35 1.75 - a1 0.0040 0.0098 0.10 0.25 - b 0.013 0.020 0.33 0.51 9 c 0.0075 0.0098 0.19 0.25 - d 0.1890 0.1968 4.80 5.00 3 e 0.1497 0.1574 3.80 4.00 4 e 0.050 bsc 1.27 bsc - h 0.2284 0.2440 5.80 6.20 - h 0.0099 0.0196 0.25 0.50 5 l 0.016 0.050 0.40 1.27 6 n8 87 0 8 0 8 - rev. 1 6/05
11 fn8177.5 april 18, 2007 x9313 small outline package family (so) gauge plane a2 a1 l l1 detail x 4 4 seating plane e h b c 0.010 b m ca 0.004 c 0.010 b m ca b d (n/2) 1 e1 e n n (n/2)+1 a pin #1 i.d. mark h x 45 a see detail ?x? c 0.010 mdp0027 small outline package family (so) symbol inches tolerance notes so-8 so-14 so16 (0.150?) so16 (0.300?) (sol-16) so20 (sol-20) so24 (sol-24) so28 (sol-28) a 0.068 0.068 0.068 0.104 0.104 0.104 0.104 max - a1 0.006 0.006 0.006 0.007 0.007 0.007 0.007 0.003 - a2 0.057 0.057 0.057 0.092 0.092 0.092 0.092 0.002 - b 0.017 0.017 0.017 0.017 0.017 0.017 0.017 0.003 - c 0.009 0.009 0.009 0.011 0.011 0.011 0.011 0.001 - d 0.193 0.341 0.390 0.406 0.504 0.606 0.704 0.004 1, 3 e 0.236 0.236 0.236 0.406 0.406 0.406 0.406 0.008 - e1 0.154 0.154 0.154 0.295 0.295 0.295 0.295 0.004 2, 3 e 0.050 0.050 0.050 0.050 0.050 0.050 0.050 basic - l 0.025 0.025 0.025 0.030 0.030 0.030 0.030 0.009 - l1 0.041 0.041 0.041 0.056 0.056 0.056 0.056 basic - h 0.013 0.013 0.013 0.020 0.020 0.020 0.020 reference - n 8 14 16 16 20 24 28 reference - rev. m 2/07 notes: 1. plastic or metal protrusions of 0.006? maximum per side are not included. 2. plastic interlead protrusions of 0.010? maximum per side are not included. 3. dimensions ?d? and ?e1? are measured at datum plane ?h?. 4. dimensioning and tolerancing per asme y14.5m - 1994
12 all intersil u.s. products are manufactured, asse mbled and tested utilizing iso9000 quality systems. intersil corporation?s quality certifications ca n be viewed at www.intersil.com/design/quality intersil products are sold by description only. intersil corpor ation reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnishe d by intersil is believed to be accurate and reliable. however, no responsibility is assumed by intersil or its subsidiaries for its use; nor for any infringements of paten ts or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiari es. for information regarding intersil corporation and its products, see www.intersil.com fn8177.5 april 18, 2007 x9313 plastic dual-in-line packages (pdip) mdp0031 plastic dual-in-line package symbol inches tolerance notes pdip8 pdip14 pdip16 pdip18 pdip20 a 0.210 0.210 0.210 0.210 0.210 max a1 0.015 0.015 0.015 0.015 0.015 min a2 0.130 0.130 0.130 0.130 0.130 0.005 b 0.018 0.018 0.018 0.018 0.018 0.002 b2 0.060 0.060 0.060 0.060 0.060 +0.010/-0.015 c 0.010 0.010 0.010 0.010 0.010 +0.004/-0.002 d 0.375 0.750 0.750 0.890 1.020 0.010 1 e 0.310 0.310 0.310 0.310 0.310 +0.015/-0.010 e1 0.250 0.250 0.250 0.250 0.250 0.005 2 e 0.100 0.100 0.100 0.100 0.100 basic ea 0.300 0.300 0.300 0.300 0.300 basic eb 0.345 0.345 0.345 0.345 0.345 0.025 l 0.125 0.125 0.125 0.125 0.125 0.010 n 8 14 16 18 20 reference rev. c 2/07 notes: 1. plastic or metal protrusions of 0.010? maximum per side are not included. 2. plastic interlead protrusions of 0.010? maximum per side are not included. 3. dimensions e and ea are measured with the leads constrained perpendicular to the seating plane. 4. dimension eb is measured wi th the lead tips unconstrained. 5. 8 and 16 lead packages have half end-leads as shown. d l a e b a1 note 5 a2 seating plane l n pin #1 index e1 12 n/2 b2 e eb ea c

▲Up To Search▲

Price & Availability of X9313UM-3T1

	To Download X9313UM-3T1 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .